Procedure for Wafer-Level DC Characterization of Bias Temperature Instabilities
standard by JEDEC Solid State Technology Association, 12/01/2015

ADDENDUM No. 1 to JESD24 – METHOD FOR MEASUREMENT OF POWER DEVICE TURN-OFF SWITCHING LOSS
Amendment by JEDEC Solid State Technology Association, 10/01/1989

RADIO FRONT END – BASEBAND (RF-BB) INTERFACE
standard by JEDEC Solid State Technology Association, 02/01/2006

STANDARD LIST OF VALUES TO BE USED IN SEMICONDUCTOR DEVICE SPECIFICATIONS AND REGISTRATION FORMAT
standard by JEDEC Solid State Technology Association, 10/01/1980

INFORMATION REQUIREMENTS FOR THE QUALIFICATION OF SILICON DEVICES
standard by JEDEC Solid State Technology Association, 10/01/2007

ADDENDUM No. 9B to JESD8 – STUB SERIES TERMINATED LOGIC FOR 2.5 VOLTS (SSTL_2): Includes Errata and Corrected Page 7 as of October 18, 2002
standard by JEDEC Solid State Technology Association, 05/01/2002

PROCESS CHARACTERIZATION GUIDELINE
standard by JEDEC Solid State Technology Association, 08/01/2018

LEAD INTEGRITY
standard by JEDEC Solid State Technology Association, 05/01/2003

STRESS-TEST-DRIVEN QUALIFICATION OF INTEGRATED CIRCUITS
standard by JEDEC Solid State Technology Association, 09/01/2017

ASSESSMENT OF AVERAGE OUTGOING QUALITY LEVELS IN PARTS PER MILLION (PPM)
standard by JEDEC Solid State Technology Association, 04/01/1995

EXPANDED SERIAL PERIPHERAL INTERFACE (xSPI) FOR NON VOLATILE MEMORY DEVICES, VERSION 1.0
standard by JEDEC Solid State Technology Association, 08/01/2018

SOLID STATE DRIVE (SSD) REQUIREMENTS AND ENDURANCE TEST METHOD
standard by JEDEC Solid State Technology Association, 03/01/2016